{"product_id":"exceptional-kernel-engineering-memory-m-shor-9798269523187","title":"Exceptional Kernel Engineering - Memory and Processes: Paging, Virtual Memory, and the Process Model","description":"\u003cp\u003eI wrote this book to give systems programmers a precise, working model of memory and processes inside a real kernel built in C on x86-64. Instead of glossing over details, I treat page tables, allocators, VMAs, faults, and user crossings as rigorously as any other data structure or algorithm. My approach is simple: define the invariants, present clean APIs, and show how each piece composes under load, across cores, and in the presence of failures.\u003c\/p\u003e\u003cp\u003eI start with the layout of the address space and the physical page inventory, then build up a buddy allocator and slab style object caches that deliver predictable latency and low fragmentation. I treat page tables as a carefully edited tree with well defined map, unmap, and protect operations, including large page promotion and demotion. From there I construct the page fault path that powers demand paging and copy on write, and I show how ELF programs are mapped, how PIE and ASLR fit, and how dynamic linking and thread local storage are set up cleanly.\u003c\/p\u003e\u003cp\u003eBecause performance and safety live in the details, I work through TLB behavior, PCIDs, and shootdowns, then show how to keep the kernel fast during frequent address space edits. I connect memory to I\/O with mmap and a coherent page cache, and I explain reclamation under pressure with eviction policies and swap. Finally, I walk the user boundary with copy to user and copy from user, SMEP and SMAP, W X, and pinned buffers, then lay out efficient syscall entry and exit, context switching with XSAVE, and the full process lifecycle with fork, exec, exit, and signal delivery.\u003c\/p\u003e\u003cp\u003eWhat you will learn with clarity and depth: \u003c\/p\u003e\u003cul\u003e\n\u003cli\u003eHow to design a robust virtual address space for user and kernel, including higher half mappings and per CPU regions\u003c\/li\u003e\n\u003cli\u003eHow to track and allocate physical memory with zones, NUMA awareness, and a buddy allocator that cooperates with large pages\u003c\/li\u003e\n\u003cli\u003eHow to implement a fast kernel heap with object caches, constructors, and per CPU magazines\u003c\/li\u003e\n\u003cli\u003eHow to edit page tables safely, including caching flags, NX, user and supervisor bits, and transparent large pages\u003c\/li\u003e\n\u003cli\u003eHow to handle page faults for demand zero and copy on write, and how to build a reliable ELF loader with PIE and ASLR\u003c\/li\u003e\n\u003cli\u003eHow to unify file I\/O and memory through mmap and a page cache, and how to reclaim under pressure with swap\u003c\/li\u003e\n\u003cli\u003eHow to minimize stalls with PCIDs and batched TLB shootdowns\u003c\/li\u003e\n\u003cli\u003eHow to cross the user boundary safely, implement syscall trampolines, and switch contexts without surprises\u003c\/li\u003e\n\u003c\/ul\u003e\u003cp\u003eI wrote it for readers who want engineering grade explanations that connect design choices to measurable behavior. If you enjoy reasoning from invariants, care about correctness under concurrency, and want code that survives real workloads, this book is for you.\u003c\/p\u003e\u003cbr\u003e\u003cbr\u003e\u003cb\u003eAuthor:\u003c\/b\u003e M. Shor\u003cbr\u003e\u003cb\u003eISBN-13:\u003c\/b\u003e 9798269523187\u003cbr\u003e\u003cb\u003ePublisher:\u003c\/b\u003e Independently Published\u003cbr\u003e\u003cb\u003eLanguage:\u003c\/b\u003e English\u003cbr\u003e\u003cb\u003ePublished:\u003c\/b\u003e 10\/12\/2025\u003cbr\u003e\u003cb\u003ePages:\u003c\/b\u003e 388\u003cbr\u003e\u003cb\u003eFormat:\u003c\/b\u003e Paperback\u003cbr\u003e\u003cb\u003eWeight:\u003c\/b\u003e 1.14lbs\u003cbr\u003e\u003cb\u003eSize:\u003c\/b\u003e 9.00h x 6.00w x 0.80d","brand":"M. Shor","offers":[{"title":"Paperback","offer_id":48447095800063,"sku":"9798269523187","price":39.99,"currency_code":"USD","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0662\/2982\/9887\/files\/img_7501a5d2-e8e7-4a82-aea7-8d45d6500c55.jpg?v=1777228789","url":"https:\/\/www.whiterainbookhouse.com\/products\/exceptional-kernel-engineering-memory-m-shor-9798269523187","provider":"WR Book House","version":"1.0","type":"link"}