{"product_id":"neural-models-and-algorithms-for-s-t-chadradhar-9780792391654","title":"Neural Models and Algorithms for Digital Testing","description":"References . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 9 QUADRATIC 0-1 PROGRAMMING 8S 9. 1 Energy Minimization 86 9. 2 Notation and Tenninology . . . . . . . . . . . . . . . . . 87 9. 3 Minimization Technique . . . . . . . . . . . . . . . . . . 88 9. 4 An Example . . . . . . . . . . . . . . . . . . . . . . . . 92 9. 5 Accelerated Energy Minimization. . . . . . . . . . . . . 94 9. 5. 1 Transitive Oosure . . . . . . . . . . . . . . . . . 94 9. 5. 2 Additional Pairwise Relationships 96 9. 5. 3 Path Sensitization . . . . . . . . . . . . . . . . . 97 9. 6 Experimental Results 98 9. 7 Summary. . . . . . . . . . . . . . . . . . . . . . . . . . 100 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 10 TRANSITIVE CLOSURE AND TESTING 103 10. 1 Background . . . . . . . . . . . . . . . . . . . . . . . . 104 10. 2 Transitive Oosure Definition 105 10. 3 Implication Graphs 106 10. 4 A Test Generation Algorithm 107 10. 5 Identifying Necessary Assignments 112 10. 5. 1 Implicit Implication and Justification 113 10. 5. 2 Transitive Oosure Does More Than Implication and Justification 115 10. 5. 3 Implicit Sensitization of Dominators 116 10. 5. 4 Redundancy Identification 117 10. 6 Summary 119 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 11 POLYNOMIAL-TIME TESTABILITY 123 11. 1 Background 124 11. 1. 1 Fujiwara's Result 125 11. 1. 2 Contribution of the Present Work . . . . . . . . . 126 11. 2 Notation and Tenninology 127 11. 3 A Polynomial TlDle Algorithm 128 11. 3. 1 Primary Output Fault 129 11. 3. 2 Arbitrary Single Fault 135 11. 3. 3 Multiple Faults. . . . . . . . . . . . . . . . . . . 137 11. 4 Summary. . . . . . . . . . . . . . . . . . . . . . . . . . 139 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139 ix 12 SPECIAL CASES OF HARD PROBLEMS 141 12. 1 Problem Statement 142 12. 2 Logic Simulation 143 12. 3 Logic Circuit Modeling . 146 12. 3. 1 Modelfor a Boolean Gate . . . . . . . . . . . . . 147 12. 3. 2 Circuit Modeling 148 12.\u003cbr\u003e\u003cbr\u003e\u003cb\u003eAuthor:\u003c\/b\u003e S. T. Chadradhar,Vishwani Agrawal,M. Bushnell\u003cbr\u003e\u003cb\u003eISBN-10:\u003c\/b\u003e 0792391659\u003cbr\u003e\u003cb\u003eISBN-13:\u003c\/b\u003e 9780792391654\u003cbr\u003e\u003cb\u003ePublisher:\u003c\/b\u003e Springer\u003cbr\u003e\u003cb\u003eLanguage:\u003c\/b\u003e English\u003cbr\u003e\u003cb\u003ePublished:\u003c\/b\u003e 06\/30\/1991\u003cbr\u003e\u003cb\u003ePages:\u003c\/b\u003e 184\u003cbr\u003e\u003cb\u003eFormat:\u003c\/b\u003e Hardcover\u003cbr\u003e\u003cb\u003eWeight:\u003c\/b\u003e 1.02lbs\u003cbr\u003e\u003cb\u003eSize:\u003c\/b\u003e 9.21h x 6.14w x 0.50d","brand":"S. T. Chadradhar","offers":[{"title":"Hardcover","offer_id":47422703075583,"sku":"9780792391654","price":109.99,"currency_code":"USD","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0662\/2982\/9887\/files\/img_bce76dc8-ddb5-4fbc-9243-87a55df2eb3d.jpg?v=1761527936","url":"https:\/\/www.whiterainbookhouse.com\/products\/neural-models-and-algorithms-for-s-t-chadradhar-9780792391654","provider":"WR Book House","version":"1.0","type":"link"}