Digital Logic Design Using Verilog: Coding and Rtl Synthesis by Taraate, Vaibbhav

Digital Logic Design Using Verilog: Coding and Rtl Synthesis (Hardcover) (ISBN-13: 9789811631986)

Vendor: Vaibbhav Taraate
Product type: Books
Format: Hardcover
$129.99
$129.99
$129.99
Subtotal: $129.99
Digital Logic Design Using Verilog: Coding and Rtl Synthesis by Taraate, Vaibbhav

Digital Logic Design Using Verilog: Coding and Rtl Synthesis

$129.99
Digital Logic Design Using Verilog: Coding and Rtl Synthesis by Taraate, Vaibbhav

Digital Logic Design Using Verilog: Coding and Rtl Synthesis

$129.99
Format: Hardcover
Description
Description
x
Introduction.- Combinational Logic Design (Part I).- Combinational Logic Design (Part II).- Combinational Design Guidelines.- Sequential Logic Design.- Sequential Design Guidelines.- Complex Designs using Verilog RTL.- Finite State Machines.- Simulation Concepts and PLD Based Designs.- RTL Synthesis.- Static Timing Analysis (STA).- Constraining Design.- Multiple Clock Domain Designs.- Low Power Design.- RTL Design for SOCs.

Author: Vaibbhav Taraate
ISBN-10: 9811631980
ISBN-13: 9789811631986
Publisher: Springer
Language: English
Published: 11/01/2021
Pages: 604
Format: Hardcover
Weight: 2.32lbs
Size: 9.21h x 6.14w x 1.38d
By Vaibbhav Taraate
By Vaibbhav Taraate
x

Vaibbhav Taraate is an entrepreneur and mentor at "1 Rupee S T". He holds B.E. (Electronics) degree from Shivaji University, Kolhapur (1995) and received a Gold Medal for standing first in all engineering branches. He completed his M.Tech. (Aerospace Control and Guidance) at the Indian Institute of Technology (IIT) Bombay, India, in 1999. He has over 18 years of experience in semi-custom ASIC and FPGA design, primarily using HDL languages such as Verilog, VHDL and SystemVerilog. He has worked with multinational corporations as a consultant, senior design engineer, and technical manager. His areas of expertise include RTL design using VHDL, RTL design using Verilog, complex FPGA-based design, low power design, synthesis and optimization, static timing analysis, system design using microprocessors, high-speed VLSI designs, and architecture design of complex SOCs.

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