Real Chip Design and Verification Using Verilog and VHDL by Cohen, Ben

Real Chip Design and Verification Using Verilog and VHDL (Paperback) (ISBN-13: 9781539769712)

Vendor: Ben Cohen
Product type: Books
Format: Paperback
$60.00
$60.00
$60.00
Subtotal: $60.00
Real Chip Design and Verification Using Verilog and VHDL by Cohen, Ben

Real Chip Design and Verification Using Verilog and VHDL

$60.00
Real Chip Design and Verification Using Verilog and VHDL by Cohen, Ben

Real Chip Design and Verification Using Verilog and VHDL

$60.00
Format: Paperback
Description
Description
x
Real Chip Design and Verification Using Verilog and VHDL addresses the practical and real aspects of logic design, processes, and verification. It incorporates a collection of FPGA and ASIC design practices, and uses Verilog and VHDL as a tool for expression of the desired architectures. This book is not intended to teach either HDL, as there are several books specifically geared toward teaching the languages. However, it provides various architectural design primitives, applications, and verification techniques, along with design methodologies and common practices.

Author: Ben Cohen
ISBN-10: 1539769712
ISBN-13: 9781539769712
Publisher: Createspace Independent Publishing Platform
Language: English
Published: 10/06/2002
Pages: 426
Format: Paperback
Weight: 2.16lbs
Size: 11.00h x 8.50w x 0.87d

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