System-On-A-Chip Verification: Methodology and Techniques (Paperback) (ISBN-13: 9781475774689)

System-On-a-Chip Verification: Methodology and Techniques is the first book to cover verification strategies and methodologies for SOC verification from system level verification to the design sign- off. The topics covered include Introduction to the SOC design and verification aspects, System level verification in brief, Block level verification, Analog/mixed signal simulation, Simulation, HW/SW Co-verification, Static netlist verification, Physical verification, and Design sign-off in brief. All the verification aspects are illustrated with a single reference design for Bluetooth application.
System-On-a-Chip Verification: Methodology and Techniques takes a systematic approach that covers the following aspects of verification strategy in each chapter:

1. Explanation of the objective involved in performing verification after a given design step;
2. Features of options available;
3. When to use a particular option;
4. How to select an option; and
5. Limitations of the option.

This exciting new book will be of interest to all designers and test professionals.

Author: Prakash Rashinkar,Peter Paterson,Leena Singh
ISBN-10: 1475774680
ISBN-13: 9781475774689
Publisher: Springer
Language: English
Published: 04/23/2013
Pages: 372
Format: Paperback
Weight: 1.22lbs
Size: 9.21h x 6.14w x 0.81d