Verification Techniques for System-Level Design (Hardcover) (ISBN-13: 9780123706164)

This book will explain how to verify SoC (Systems on Chip) logic designs using "formal" and "semiformal" verification techniques. The critical issue to be addressed is whether the functionality of the design is the one that the designers intended. Simulation has been used for checking the correctness of SoC designs (as in "functional" verification), but many subtle design errors cannot be caught by simulation. Recently, formal verification, giving mathematical proof of the correctness of designs, has been gaining popularity.For higher design productivity, it is essential to debug designs as early as possible, which this book facilitates. This book covers all aspects of high-level formal and semiformal verification techniques for system level designs.

Author: Masahiro Fujita, Indradeep Ghosh, Mukul Prasad
ISBN-10: 0123706165
ISBN-13: 9780123706164
Publisher: Morgan Kaufmann Publishers
Language: English
Published: 11/01/2007
Pages: 256
Format: Hardcover
Weight: 1.47lbs
Size: 9.24h x 7.64w x 0.86d